Orosz, Péter2012-11-072012-11-072012Carpathian Journal of Electronic and Computer Engineering. - 5 : 1 (2012), p. 44-48. -Carpathian J. Electr. Comp. Eng. - 1844-96891844-9689http://hdl.handle.net/2437/147702Improving Packet Processing Efficiency on Multi-core Architectures with Single Input Queuefolyóiratcikkopen access journalopen access journalhttp://webpac.lib.unideb.hu:8082/ebib/CorvinaWeb?action=cclfind&resultview=long&ccltext=idno+BIBFORM039068Műszaki tudományokInformatikai tudományokEditura Universităţii de Nord Baia Mare2017-12-01